As shown in FIG. 1, a typical computer system 10 includes at least a microprocessor 12 and some form of memory 14. The microprocessor 12 has, among other components, arithmetic, logic, and control circuitry that interpret and execute instructions necessary for the operation and use of the computer system 10. Further, the computer system 10 includes integrated circuits 16 having various functionalities and communication paths, i.e., buses and wires 18, that are necessary for the transmission and reception of data among the aforementioned components of the computer system 10.
As the frequencies of modern computer systems increase, the need to rapidly transmit data between integrated circuits (e.g., 16 in FIG. 1) also increases. To accurately receive data, a clock signal is often transmitted in correspondence with the data signal to help recover the data at a receiving end. In such “source synchronous” input/output (I/O) interfaces, the clock signal determines when the data signal should be sampled by a receiving circuit.
FIG. 2 shows a block diagram of a typical I/O interface 20. In the I/O interface 20, a transmitting circuit 22 sends data on a data signal 26 to a receiving circuit 24. To aid in the recovery of data transmitting on the data signal 26, a clock signal 28 is transmitted with the data signal 26.
Those skilled in the art will understand that multiple data and clock signals may be propagated between the transmitting circuit 22 and the receiving circuit 24. Further, those skilled in the art will understand that the receiving circuit 24 may transmit data and/or a clock signal back to the transmitting circuit 22.
The data signal 26 and the clock signal 28 are used to transmit information from the transmitting circuit 22 to the receiving circuit 24 under the direction of a control signal 30. The control signal 30 may determine on which cycle, what frequency, and/or under which operating mode data and clock signals should be transmitted between the transmitting circuit 22 and the receiving circuit 24.
Performance across an I/O interface may degrade as a result of various conditions such as, for example, process, temperature, and voltage variations. Such performance degradation may lead to inaccurate data reception. In other words, a receiving circuit may not accurately receive data bits as transmitted by a transmitting circuit. For example, due to undesirable conditions, a receiving circuit may only accurately receive 995 of 1,000 data bits transmitted by the transmitting circuit during a particular time interval, thereby resulting in a 0.5% bit error rate. In some computer systems, even a 0.5% bit error rate may be fatal to the accurate operation of the computer system.